[00:20:01] NASSP Logging has been started by thewonderidiot [16:47:46] morning! [17:15:45] so bad news from NARA land [17:15:52] their aperture card scanner broke [17:16:02] Ron wore it out? [17:16:08] I guess so, haha [17:16:17] he said it was starting to chug on his third day of scanning [17:16:27] ugh, are they going to get it fixed at some point? [17:16:28] it went from 2000 cards/day down to 1600 cards/day [17:16:35] and then today just wasn't working at all [17:16:49] I guess they're trying to figure out if there's something they can do or if they have to ship it out for repair [17:17:17] sadly this is their only scanner, so they won't be able to take phone orders until it's fixed either [17:17:25] The thing was made in the early 70s? [17:17:38] https://www.wwl.co.uk/wp-content/uploads/2018/11/C400-Aperture-Card-Scanner-Sell-Sheet.pdf [17:17:44] it's one of these apparently [17:22:22] hey guys [17:22:24] and these little things go for $15k so replacing it (or getting our own) is not feasible [17:22:30] hey [17:22:33] hmm [17:22:42] guess he has to find something else to scan then :P [17:22:49] haha [17:23:05] no luck for you, he left after it was determined broken, and intends to not go back until it's fixed [17:23:28] how rude [17:24:08] did you guys hear the good news? NASA is planning to build the USS Enterprise from Star Trek [17:24:17] here the first proof of concept: https://forum.nasaspaceflight.com/index.php?topic=45947.msg1928936#msg1928936 [17:24:25] Shuttle derived, of course, will make it much cheaper [17:24:51] he gets a vacation day every 2.5 weeks and it takes 1 day per box if the scanner is in full working order, and there's 47 MIT boxes [17:24:53] oh boy [17:25:16] haha that drawing is great [17:25:31] I like the solid rocket warp drive nacelles [17:26:00] yeah :D [17:26:45] crew compartment disk built by some new contractor, have to let those in on the fun as well [17:27:26] but what you are saying is that Ron already got a few 1000 new scans done [17:28:08] doesn't sound so bad to me [17:28:43] 7000 scans, yeah [17:29:12] https://archive.org/details/apertureCardBox459NARASW_images [17:29:15] https://archive.org/details/apertureCardBox460NARASW_images [17:29:34] he's going to upload the partial box 461 later today [17:30:26] 7000 pages of MSC memos would keep me busy for a year, lol. And judging by the commits from Ron in the last few months, it will keep him busy for sure. [17:30:43] there's so much stuff in here [17:30:55] among the new stuff is the assembly drawings for all (I think) of the Block II CDU modules [17:31:12] and the drawing for the CDU itself does confirm backplane wiring differences between the CM and LM CDUs [17:31:20] in addition to the missing modules [17:31:34] no schematics yet... those are in box 462 [17:32:00] well, I already that there were different CDU types functionally, haha. Everything I knew was pointing to that [17:32:06] already knew* [17:32:35] well yes, but it wasn't clear how that was manifested [17:32:48] the two could have been electrically the same but wired into the spacecraft differently for all we knew [17:33:43] it seems like the modules are all the same, it's just that the interconnections on the backplane are different [17:33:43] no [17:34:01] yeah, the interconnections are the crucial part [17:34:30] the way I understand the CDUs so far need them to be different internally, not just with the connection to the spacecraft [17:35:03] trust me, our RR CDU is basically feature complete and it does not work as a OCDU, I've tested it, haha [17:35:30] it's that read counter and error counter connection that will be different [17:35:35] probably not much else [17:36:28] the schematic in the LM Systems Handbook is pretty good [17:36:45] of course not a real drawing of it, but very detailed [17:37:08] PDF page 189/190 [17:39:04] don't think the one in the CSM Systems Handbook is as detailed, which would have been useful [17:39:18] so the full drawings should still help with understand the actual electrical differences [17:41:22] even helpful for NASSP I mean [17:41:30] I dunno, maybe I don't understand well enough, but I figured it was conceivable that the box would be the same, and the interconnections that needed to be different could be brought out to the main connector and made there -- so that the behavior becomes different depending on what cable is plugged into ti [17:41:31] obviously necessary for any more detailed understanding :D [17:41:32] *it [17:41:47] yeah, we'll get there as soon as they fix their darn scanner haha [17:42:25] my worry is that the wiring differences might only be captured on the wire list, which probably wasn't put onto aperture cards [17:42:59] that probably isn't the case, but I still worry about it haha [17:44:45] I really hope the CDU schematics are complete [17:44:53] that also worries me [17:46:45] it would help if they are complete, yes, haha [17:47:13] the 2003200+ AGC schematics turned out not to be [17:47:26] so we're lucky we had other sources for those [17:48:19] a lot of the CDU schematics got multiple drawing numbers as they were revised, so that's lucky [17:49:47] the super not detailed AOH calls the CDUs in the CSM "almost identical", haha [17:50:31] just to call them identical a few passages later [17:50:37] so I guess "almost" still applies [17:50:45] yeah [17:52:54] we'll find out sooner or later, heh [17:55:56] Apollo 11 Delco Manual, PDF page 202 shows the difference nicely [17:56:32] I just can't imagine how that would work without functional differences. Which includes backplane wiring of course [18:06:50] btw, SteveH, your simulator enclosure looks pretty great :D [18:53:47] Thanks. Still a work in progress. [17:02:09] morning! [17:04:10] hey [17:04:26] what's up? [17:05:53] just making slow progress on the launch window calculation stuff when I have time [17:06:51] same thing as always in the last 2 weeks, lol [17:07:02] haha [17:12:17] it outputs an insertion state vector now [17:12:27] which can be used for rendezvous planning before launch [17:12:35] nice :D [17:13:22] including some Shuttle specific stuff, like the sep maneuver from the external tank and dumping the rest of the propellants from the Shuttle [17:13:48] I left that part of the launch window processor class though, will make it easier to just copy&paste this into the RTCC MFD for Skylab [17:13:55] or AS-278 actually [17:14:13] I realized that the same equations in the IBM RTCC document were probably for AS-278 [17:14:38] hah [17:14:58] nice [17:15:15] seems like you keep finding reused equations :D [17:15:35] yeah [17:15:46] and even more references to memos I don't have [17:16:00] there actually is a specific one for AS-278 from late 1966 [17:16:42] "Logic and Equations for the Real-Time Computation of AS-207/208 Insertion Elements and Specialized Orbital Maneuver" 66-FM-116, Oct. 9, 1966 [17:17:00] too early for the range of memos that the archived NTRS has [17:17:25] well [17:17:28] I have about 10 from 1966 [17:17:42] at least, 10 that I have catalogued so far [17:50:03] so good news on my end -- I got the monitor boards in this weekend and got the first one soldered up [17:50:13] all of the circuits have checked out and I'll be putting an FPGA onto it tonight :D [17:50:24] https://photos.app.goo.gl/HyZNjgmc5AJuBCoS7 [17:50:37] that's it regulating "AGC" 4 volts down to 3.3 for the FPGA [18:08:16] awesome [18:14:28] Very nice! [15:04:04] hey [15:10:36] hey Alex [15:11:19] I'm in the testing stage of the initial version of the launch window processing [15:11:23] processor* [15:11:53] lots of things still to do, but for launch time and insertion inclination it would already be usable for the LVDC as well [15:20:38] I'm mostly basing this on a 1980 document for Shuttle, but the IBM RTCC document I have been using for many things also has equations for this. Probably for the AS-278 mission actually. [15:20:47] I really want to be able to do a dual launch mission... [15:27:32] Cool stuff [15:27:49] On my end I may see my 1st live launch on Sunday! [15:28:33] Falcon Heavy? [15:28:39] yeah [15:28:56] so one launch and two landings, haha [15:29:11] My girlfriend is from Cocoa Beach not far from KSC haha [15:31:08] if they stay on schedule then you have a nice show ahead of you [15:31:18] yeah, hopefully [15:31:19] the static fire was slipping a few times, hopefully that doesn't continue [15:41:32] If I remember correctly, you own a FFB joystick? [15:42:11] yes [15:42:28] Microsoft Sidewinder Force Feedback 2 [15:42:36] Ah right [15:42:44] I found one of those for cheap on ebay [15:43:31] we bought it when MSFS 2004 was released and it has endured until today, definitely can recommend it [15:43:55] DCS has some decent force feedback modelling so I bought it [15:44:15] Does Orbiter have FFB support? [15:44:56] not by default I think [15:45:06] but we aren't even using the default system for NASSP anyway [15:45:11] yeah [15:45:32] I am trying to think if there would be any point anyway to use FFB on an RHC/THC [15:45:52] yes, resistance to being moved out of detent [15:46:02] there is a specific force curve in the AOH [15:46:07] for the LM at least [15:47:00] I think the system we use would support that [15:47:08] I have thought about implementing it in the past [15:50:28] certainly would be interesting [16:50:42] morning! [17:01:04] hey Mike [17:04:08] what's up? [17:05:00] I've proceeded to the stage where I can actually do Shuttle launches in SSU to check if the launch targeting calculations are correct [17:05:42] sweet! [17:05:58] so far it's quite good. SSU doesn't do any yaw steering during the ascent, so I have to do some "calibration" of the launch time to achieve specific results [17:06:24] which are slightly different from the optimum launch time generally used for Shuttle launches [17:07:13] but the difference is just 20 seconds of launch time, so I'll try the same thing I did earlier today, just 20 seconds later [17:07:46] 20 seconds later launch with no yaw steering already gives a plane difference of about 30 ft/s, so definitely already significant [17:08:11] for the LVDC it will be no problem of course [17:08:44] :D [17:09:01] wow yeah that is more significant than I would have guessed [17:09:29] it's a tiny amount of steering it would have to do after the closed loop guidance has started [17:10:14] because the Earth in Orbiter is spherical we get the same kind of yaw error for every launch with the LVDC to the Moon [17:10:27] but 30 ft/s is only a 0.07° difference in the orbital planes [17:10:36] and that just requires a tiny amount of yaw steering [17:10:52] but becomes expensive if an orbital maneuver has to be done to correct it [17:11:57] not sure how much the spherical Earth is causing, but it wouldn't be much more than that 0.07° [17:15:04] changing your orbital plane when you are going 8 km/s is more difficult than when you haven't reached orbital speed yet, who would have thought :D [17:15:17] hahaha fair enough [17:16:32] but I am looking forward to see a Saturn IB do some significant yaw steering during an ascent when it's launching early or late in a launch window [17:17:18] the Skylab Saturn IB LVDC supported first stage yaw steering even, had a polynomial for that [17:17:45] but saturn V didn't? [17:17:56] not until the Skylab launch itself I think [17:18:03] gotcha [17:18:31] I just remembered, the EDD actually has an example polynomial taken from the Skylab launch [17:18:53] so not even for a Saturn IV, not very useful for us to use then, haha [17:18:57] Saturn IB* [17:19:09] haha [17:19:37] yeah, the EDD is from mid 1972 [17:19:47] so no final numbers yet [17:21:04] "The data in this table reflects the SL-1 Yaw Profile and is included for checkout purposes only. SL-2 data will be provided as soon as it becomes available" [17:21:07] thanks a lot, EDD [17:21:20] bastards [17:21:37] same applies to some targeting data, but in that case it doesn't matter that it's not the same rocket [17:22:45] I'm pretty sure SL-1 is always the Saturn V [17:22:54] as you will remember there is some numbering confusion... [17:23:09] yeeaaahhh [19:31:52] SteveH, I got the FPGA board integrated onto my board yesterday and everything is working: https://i.imgur.com/gSF6fJK.jpg [19:32:18] I think I've tested everything that I can without having an AGC to plug it into... so now I need to finish the board that electrically simulates the test connector [19:36:28] Great! Once you get everything settled on your end, I would be interested in talking about arranging to source / purchase the necessary boards and fpga dev kit so I can create one for my agc. [19:38:01] On an editorial note, I really dislike the security settings at work. I cannot connect to ibiblio, or imgur.com. I'm pulling up the image you sent me on my phone. :/ [19:40:25] Very nice, yeah I could create a short cable to splice that into my monitor connector :) [19:42:09] nice :D [19:42:27] https://numato.com/product/styx-zynq-7020-fpga-module [19:42:32] that's the FPGA dev board I'm using [19:42:48] with female headers [19:43:42] the one thing I found yesterday is that the LDO 3.3V output at low load is pretty spiky [19:43:48] once it gets up to 30mA or so it smooths out [19:44:25] and I think the typical operating point will be closer to 60mA-ish so hopefully it won't matter... but I'd still like to clean it up if there's an easy fix [19:44:25] Nothing that a load resistor cannot fix :) [19:44:35] haha well that would work too [19:45:20] So, the "female header on bottom" option is the correct one? (assuming your picture is showing the fpga board installed bottom side up) [19:46:04] sorry, meant female header on *top* option... [19:46:07] "female header on top" [19:46:08] yeah [19:47:06] and for programming it you need some xilinx programming cable -- I use a digilent HS-3 [19:47:07] https://store.digilentinc.com/jtag-hs3-programming-cable/ [19:54:23] night! [17:00:39] morning! [17:26:19] hey [17:26:28] hey [17:26:29] what's up? [17:27:57] planning how to lay out all the input parameters for the launch window processor [17:28:07] it's going to be at leadt 2 pages full of them [17:28:10] least* [17:30:00] hahaha oh man [17:30:55] it's a bit tedious adding so many things, haha [17:31:02] yeah I can imagine [17:31:34] and I'm already using a special library to make it easier to add new MFD pages, buttons etc. [17:31:48] without that the RTCC MFD would have been nearly impossible [17:31:52] it has like 40 pages [17:32:25] I'm only up to 7 pages with the Shuttle FDO MFD :D [17:32:32] but that's going to jump to 9 now [17:34:38] 45 pages for the RTCC MFD [17:34:41] each with 6 buttons [17:34:45] haha jeez [17:34:49] and you need to specify shortcuts for each one [17:34:56] and a descriptive text [17:35:43] and for each button there are 3 functions, if it's a button with an input box [17:36:12] each with up to 12 buttons actually, not 6. 6 on each side [17:38:09] so yeah, that's why it is tedious [17:38:57] do you think this one is going to get up to the size of the RTCC MFD eventually? :P [17:39:24] I'm not planning to [17:40:10] and I don't think it will, Apollo was more complex [17:42:16] the next big thing I could potentially do for Shuttle is the Deorbit Targeting Processor [17:42:29] in one of the documents I found there are like 250 pages on that [17:44:34] it's referencing the same JSC memo from 1976 as the FDO Console Handbook from 2007, so it probably hasn't changed much [17:45:04] the launch window and targeting stuff has changed more since then [17:46:42] oh lol [17:46:58] in working out the layout of the two input pages I forgot to add a "calculate" button [17:47:04] rather important to have that [17:47:08] hehehe [17:47:14] yep, definitely need that one [17:47:44] and also a way to cycle between pages... [17:48:10] so, uhh [17:48:13] maybe it's 3 pages [17:51:12] lol [17:51:29] 2 input pages, one page with the CLC button and the output display. So still 3 basically [20:04:12] night! [16:53:07] morning! [16:56:51] hey Mike [16:57:27] what's up? [16:58:10] got all that annoying input stuff done [16:58:29] nice! [18:08:58] SteveH, I'm pretty sure I've solved the voltage ripple problem on the regulated 3.3V [18:09:27] it seems like doubling the size of the output capacitor completely fixes it, and makes a perfectly smooth output at even no load [18:09:56] I'm getting in the bigger capacitors tonight or tomorrow hopefully so I'll be able to swap the part out and fully confirm it then [18:32:54] ...or maybe not until monday according to current tracking :( [19:05:06] ah, new AGC restoration video [19:14:36] thewonderidiot, I should have thought of the bigger cap myself. Yeah that makes a lot of sense. [19:26:32] hey SteveH, have you made any progress on uplinking yet? [19:27:20] yeah new video just went up! [19:27:21] https://www.youtube.com/watch?v=ThOXgcOOA1M&feature=youtu.be [19:27:51] all about your AGC Monitor [19:28:23] :D [19:30:00] Progress has been slow this week. I need to place an order for several miscellaneous parts including the correct d-sub pins. Will most likely work on gyro emulation software this weekend [19:31:30] Real life got in the way of progress this week. [19:31:36] I hate it when that happens :P [19:32:52] that's why my latest commit for anything Orbiter related is 17 days old [19:33:00] not just because launch windows are complicated, haha [19:34:06] Been working on some design tweaks to the master processor for my emulator. Using SPI I have only one receive thread and been working on a round-robin scheme to poll all the individual PIC processors to keep data up to date. [19:35:43] yeah that's always tricky. especially if the SPI bus gets big enough that capacitance starts to limit how fast you can talk to each of them [19:36:15] The good thing is that by modern standards, the AGC is a relatively slow computer. :D [19:36:30] hehe yeah [19:37:23] And IO updates in the milliseconds range are fast enough at the level where the SPI runs. All the higher speed bit-banging is handled by the PICs [19:37:32] it's very nice implementing all of the monitor stuff in an FPGA that has a clock 100x faster than the computer's -- I can respond as slowly as I want, debounce the inputs by waiting for a few clock cycles, and still have all the time in the world [19:37:43] yeah for sure [19:38:54] So the SPI needs to provide delta acceleration values and delta angle info, and poll all AGC discretes. things like that. Most of that stuff is only sampled by the AGC every several milliseconds. [19:39:00] a round robin scheme would also help our AGC/AGS communication in NASSP [19:39:26] to keep them in sync [19:41:50] Here's a work-in progress image of my emulator. The Raspberry Pi is the master processor that will have a QT gui touch screen interface. The cabling present is for SPI. Each PIC controller will emulate a specific peripheral (PIPA, Gyro, Port, etc). Room for 2x-3x the number of PICs currently mounted. d-sub connectors will go the the physical AGC. [19:41:53] https://drive.google.com/open?id=1gpuISBfyfeCC4rh3eGTL9EECLJR0i3ax [19:43:55] lots of stuff just for the peripherals, haha [19:45:48] Yes there is. But lots of wires to/from the physical AGC. Keeping it modular is helping. the little boards can handle a 16 bit interface, the larger board handles up to about 27 signals. Right now one little board is running uplink/downlink and another PIPA. [19:49:26] so many wires. serial interfaces were a great innovation haha [19:50:48] How many wires on the IO Mike? I forget but I know is around 200+ ish wires. I allowed for up to 300 so I can also connect physical hand controllers to the emulator [19:51:09] 360 on the main connector [19:51:24] but you probably don't care about the R circuits so that cuts out a dozen or two [19:51:31] Yeah, but I forget how many of those 360 are unique signals. [19:51:44] 18 are power/ground [19:51:47] and I'm running single-ended digital interfaces [19:51:51] oh yes [19:51:58] many of these are transformer-coupled pairs [19:52:05] you're definitely good [19:52:29] I *did* count them all a while ago but just purged that unpleasant memory [19:52:33] hahaha [19:52:42] that's one of my tasks for this weekend actually [19:53:01] I'm going to put together a table that maps the alphanumeric designator for each wire to the internal net name in the AGC [19:53:17] to have it document that, for example, D-207 is SBYBUT [19:53:27] *documented [19:53:52] and then I'm going to color in every pin on the backplane viewer based on what subsystem it's used for [19:54:03] I have something similar in my netlist I generated for my AGC. Placed all the module connectors on a single schematic, resolved any naming mis-matches and that's what I used for the wire-wrap netlist [19:54:04] so we have a good idea of how wires are grouped for building harnesses [19:54:10] and I thought the I/O schematic in the LM Systems Handbook had many connections... [19:55:07] but it's the same numbers from there, right? [19:55:18] so your 207 is "Enable STBY to DSKY" [19:55:44] no, different numbers [19:56:00] the LM-8 systems handbook has actual pin numbers [19:56:21] the designators are unique codes throughout the whole PGNCS [19:56:21] I only remembered that you found those numbers useful, haha [19:56:41] so D-207 is on AGC main connector pin 502, for example [19:56:45] no correlation between the numbers [19:56:58] and yes, that discovery of yours is the reason why this whole restoration thing started haha [19:57:19] what a weird sequence of events [20:00:10] but it was you who discovered that the JSC History Collection is rather useful for our purposes :D [20:00:22] hehehe [20:00:53] my jaw just about hit the floor when you gave me that pin number without realizing it, haha [20:01:07] that was one of the things I had been searching the hardest for for a couple years at that point [20:46:23] night! [17:03:04] good evening [17:05:22] morning! [17:08:00] hey [17:08:11] checklists! [17:08:29] AFJ uploaded scans of two of the Apollo 11 checklists from the Smithsonian [17:09:04] Launch checklist and Operations Checklist, which is G&C and Systems Checklist combined [17:09:18] and I sent David Woods an email and asked if there is more to come :D [17:09:31] oh!! nice :D [17:09:33] the one with the backup erasable load is the Alternate & Contingency Checklist [17:09:38] that's the one Ryan asked them about [17:09:44] that is awesome! [17:10:00] currently making PDFs from the pictures of the individual pages [17:31:03] for the longest time we didn't have any CSM G&C Checklist from before Apollo 15 [17:31:21] the Apollo 8 one is very similar to 11 of course [17:31:26] but there is still some unique stuff [17:36:02] same in the launch checklist. TD&E procedure is slightly different (almost on every mission) and indeed there is no way yet for the CMC to start the TLI events in the LVDC [17:36:20] Apollo 12 already had an erasable memory program for that [17:36:29] apparently doesn't work yet in Comanche 055 [17:38:02] oh interesting [17:39:30] probably just had to reorganize some erasable memory variables so that they could load an EMP like that [17:39:44] other than that there wouldn't really be anything in software that prevents it [17:39:57] but the one from the Apollo 12 padload definitely doesn't work in Comanche 055 [17:40:17] well hopefully we'll be able to dump comanche 67 and find out what exactly changed :D [17:40:42] and use that EMP [17:40:57] on the other hand, the CMC takeover during boost was already working [17:41:12] so the hardware connections were all working [17:41:16] between CMC and IU [17:41:33] hmm [17:41:44] so we might be able to change the EMP slightly to make it work if we really wanted to [17:42:14] yeah, that might be possible [17:42:49] all it really does is set an output bit at the right time [17:43:17] do we have the code for the EMP or just the octal? [17:44:31] Data Book has just the octal [17:45:23] fun :D [17:45:44] maybe I'll try fixing it after I go get some food [17:46:21] yeah, you give it the TB6 time from the TLI PAD and it then automatically sends the output bit at the schedule time [17:46:38] the Apollo 12 checklist has the even more manual procedure to just set the output bit yourself [17:47:04] and of course the procedure to start the EMP [17:47:25] might be difficult to fix when you don't know the erasable memory locations it is referencing [17:48:26] the Apollo 11 backup procedures still need the LVDC to be able to determine the TB6 start time itself [17:48:52] which basically means the LVDC is working at least 99% correctly [17:49:04] could be useful if the FCC is broken or so [17:49:10] no [17:49:12] half broken [17:49:27] it would be CMC -> FCC commands, just via a different channel [18:24:38] yeah, will have to see how bad it is [18:24:46] my guess is that whatever it's referencing probably didn't move too far [18:31:11] hmm [18:31:19] so this EMP is somewhere in the CSM data book? [18:31:41] the 1969 one [18:32:00] HSI-208962 [18:32:09] PDF page 799 [18:32:16] it's all called "TB6JOB" [18:32:34] and the procedure to use it is here: https://history.nasa.gov/afj/ap12fj/pdf/a12_l_o_c.pdf [18:32:45] PDF page 43 [18:33:50] oh cool, that's simple [18:34:50] oh, and I guess a countdown to TB6 is also part of it, judging by the procedure [18:35:04] "F 06 45 Time froM TB6" [18:35:08] 34* [18:47:19] remember this? https://history.nasa.gov/afj/ap11fj/a11csmoc/a11-csmoc-f4-13.jpg [18:48:40] hmmmm, no? [18:49:00] P38 [18:49:04] stable orbit rendezvous program [18:49:19] I taught you how to use it when you were waiting for a flight or so [18:49:27] with the standalone Virtual AGC [18:50:04] oh! yes :D [18:50:18] Apollo 11 CMC still had it, was deleted afterwards [18:50:28] just like P17, TPI Search [18:52:53] making space for, no idea [18:53:14] hehe [18:53:28] well I am almost done disassembling this [18:53:33] and it is very obviously broken lol [18:55:17] modifies memory it really shouldn't modify? :D [18:56:07] it caluclates a time and then transfers control to NEWMODEA... to set the major mode to that time??? [18:56:16] lol [18:56:33] two digit time display, super useful [18:57:18] oh btw, my favourite thing from the latest AGC video is when you made a digit display || instead of 0 [18:57:34] didn't even know you could do that [18:58:45] hehehe [18:58:58] yeah the relay decoding can lead to some weird "digits" [18:59:24] the proper software just doesn't have any way for you to give the DSKY something bad :D [18:59:35] yeah [18:59:44] you could display things like: HELP [19:00:01] sadly you can't make a lot of letters [19:00:03] to randomly freak out some astronauts [19:00:17] yeah, but at least some, haha [19:02:11] Ron made an image of all of the possible digits at some point... where was that... [19:03:21] https://www.ibiblio.org/apollo/traceDSKY.png [19:03:51] although I'm now seeing that my || isn't on there so one of the two of us has the logic wrong [19:04:36] what did I do in the video... [19:04:57] and it has duplicates [19:05:01] 15 and 17 [19:05:07] one of those probably should be an H [19:05:34] huh, no, Ron is right [19:05:47] I shouldn't be able to get || [19:05:57] why not? [19:05:58] the equations in the symbolic listing information must be wrong [19:06:17] http://tinyurl.com/yboqg5z7 [19:06:25] that implements the relay logic if you play around with switches on the bottom [19:06:38] in the video I unchecked the rightmost bit [19:06:46] and it gives a 4 without the horizontal bar instead of || [19:06:52] ah [19:07:09] '| [19:07:11] yep [19:07:30] so not all combinations are even possible, I see [19:07:42] no, not even close [19:07:59] it was really only designed to give you 0-9 and blank [19:09:33] anyways [19:09:38] does this EMP work on its own? [19:09:49] is there any chance another program was loaded at E7,1550? [19:10:11] OH [19:10:14] this goes on for more than one page [19:10:15] lol [19:10:36] haha [19:10:37] 4 pages [19:10:39] question still stands though [19:10:47] you need to do the procedure [19:11:08] in the checklist [19:11:20] V25 N26E 26000E 01513E 10067E V30E [19:11:37] and load the TB6 time in N33 [19:11:42] before that procedure [19:12:46] ahhhhhh I see what is wrong here [19:13:44] right. [19:15:35] everything makes sense now :D [19:15:41] sounds good [19:16:18] that NEWMODEA should be a WAITLIST, by the way -- so that is one thing that needs to change for this to work [19:19:44] can't find NEWMODEA in the erasable. Is that something else? [19:24:23] yeah, that's the function that displays the mode on the dsky [19:24:29] oh, right [19:24:40] it's a fixed memory reference [19:26:10] which is actually another good point. We also need to check if we can even load TB6JOB in the same erasable memory addresses [19:26:29] E7,3513... [19:26:36] er [19:26:39] E7,1513 [19:28:35] overlayed with reentry and rendezvous stuff [19:28:40] no padloads, so should be good [19:28:55] nice [19:29:01] this is making a lot more sense now [19:29:12] so far the only problem I've found is the bad address for WAITLIST [19:31:35] nevermind [19:31:39] now I have lots of problems lol [19:42:00] hmm [19:42:08] actually only a couple of problems that I don't know how to solve yet [19:43:23] fixed-fixed memory definitely moved around a bit [19:43:45] yeah, deleting those 3 programs and what not [19:47:20] I can imagine that the computer gets furious if you try to run this EMP [19:48:50] I did try to run this program, not much happened iirc [19:50:13] definitely no TLI [19:54:22] hmm [19:54:34] maybe I'm wrong about that first call being WAITLIST [19:56:02] aha! I was very wrong [19:56:04] cool [20:04:52] it's actually LONGCALL +1 [20:05:17] so far I've managed to explain all problems with a constant offset of 12 words in all fixed-fixed memory locations [20:10:21] indy91, would you expect the UPLINK ACTY light to turn on right when it starts the TLI? [20:21:35] okay all done! [20:21:37] https://gist.github.com/thewonderidiot/924fcd62e27ce13125327336b1ed366e [20:21:56] a decent number of patches required to correct the 12-word offset, but that should make it work [20:22:16] wait I forgot one change [20:23:31] okay there, fixed [20:23:41] hadn't noted the change needed on the call to TWIDDLE [20:31:56] yes [20:32:04] uplink light will be on [20:33:14] that's the sign that the CMC has commanded TB6 start [20:34:13] which is output channel 12, bit 13 [20:34:41] or 3 [20:35:03] I had some old scenario where I was testing this [20:35:28] if I don't find it I'll just use the general pre TLI scenario [20:36:06] perfect [20:37:00] Hey [20:37:05] hey SteveH! [20:37:41] Had a quick question for either you or Nick, to see if I'm following the IMU CDU interface correctly. [20:38:36] hey Steve [20:39:13] Based on what I've seen in the docs, the gyro CDUs update the AGC at a rate of 3200 pps with each pulse equal to 0.01098633 degrees. Does this sound correct? [20:39:49] That would mean a maximum rate of change of just over 35 degrees per second that the hardware can track. [20:40:08] is the scaling different between CM and LM like it is for the PIPAs? [20:40:13] no [20:40:22] same scaling [20:40:30] cool [20:40:43] I think the pulse rate can change depending on mode, though [20:41:31] Wanted a sanity check that the maximum rate of change was capped at less than 35 degrees per second. The Gyros can handle up to 60 degrees per second but it looks like the CDU interface to the AGC further limits this. [20:42:02] I'm checking the conversion function we use [20:42:04] pulse rate is 800pps for coarse align. I'm asking about normal inertial measurment. [20:43:17] I've been watching lunar rendezvous films and it looks like the fastest I've seen the CM or LM translate has been between 15 and 20 degrees per second (5-6 seconds for 90 degrees) [20:43:26] yes, the conversion is correct [20:43:51] yeah, 35°/s is very unlikely [20:44:00] Thanks, wanted a second opinion before I code this up for my hardware. [20:44:29] LM uses higher attitude rates in normal operations than the CSM, but still nowhere near 35°/s [20:45:02] highest displayed rate is 25°/s [20:45:11] in some cases you might do 20°/s yawing in the LM [20:45:28] I also saw a comment in some of the algorithm flow charts around IMU initialization where the comment was to wait approx 12 seconds to get full gyro angle from IMU. This would indicate about 30 degrees per second update rate. [20:46:13] Yeah on one of the films I clocked the LM at about 17-18 degrees per second on a 90 degree rotation. [20:46:43] Assuming the film fps rate was correct on youtube :) [20:46:56] the checklist says to wait for 15 seconds [20:47:00] did the RR CDU count at a faster frequency? it could go up to 6400pps [20:47:02] when doing a Zero ICDU [20:47:55] Yes that was it, the zero ICDU routine. Mike, have not looked to close at RR CDU yet. Trying not to explode my head on the IMU right now. ;) [20:49:15] right, I just thought I had seen that the ICDU could do 6400 as well [20:49:15] Been looking at the ICDs for the AGC and I have only seen 3200pps for the X interface circuits related to CDUs. But cannot 100% be sure of that yet. [20:49:47] but I'm not 100% sure on that [20:50:29] This was the reason for my question, I've also seen 6400 mentioned but everything I find was pointing to 3200pps. Looks like 3200 is the answer for at least the IMU. Thanks! [20:52:05] https://archive.org/stream/apollolunarexcuracel_1#page/n81/mode/2up/search/6400 [20:52:14] this diagram is showing 6400pps max for the ISS CDUs... [20:54:39] Interesting. [20:56:29] 6400 would allow a reporting range greater than the gyros can deliver, up to 70 degrees per second. I wonder if the rate was reduced to 3200 to lower the cycle stealing rate on the AGC since a max rate of 35 degrees was sufficient? I'm just guessing. [20:58:16] it's totally possible that I'm making this up, but I thought I read somewhere that the frequency could be kicked up to 6400 if the magnitude in the counter got big enough -- i.e. it would speed up if it had more pulses to send out [20:58:29] trying to remember where I might have read that [21:00:55] thewonderidiot, uh oh, one of the memory locations in the TB6JOB had already been used [21:01:24] so this range of memory addresses wouldn't really be usable for EMPs [21:01:37] just a single one though [21:01:38] E7,1536 GRP2SVQ [21:02:31] 1536 isn't used by TB6JOB though [21:02:43] they skip right over it [21:02:49] oh [21:02:52] ah yes [21:03:03] so that must be why :D [21:03:08] I was just checking in Artemis and it still had the same memory location and I got confused, haha [21:04:45] what value is normally in GRP2SVQ? [21:05:06] it's 27226 in my pre TLI scenario [21:05:27] it's something from integration initialization, so probably gets written to after the launch or so [21:06:54] ah, doesn't matter, I missed the TC right before it [21:07:05] yeah so it won't be touched [21:10:28] ok, got it all in the scenario [21:11:04] I hope there are no typos except for the 1615 and 1616 (instead of 1515 and 1516) at the beginning :P [21:11:37] haha sorry [21:11:40] hopefully not :D [21:12:21] SteveH, just to confuse things even further: "During the coarse align mode, the CDU is limited to a high counting speed of 6.4 kpps and a low counting speed of 800 cps. At all other times, the high counting speed is 12.8 kpps." [21:12:21] the procedure should still be the same as for Apollo 12? [21:12:30] yeah, procedure's identical [21:12:44] just some fixed memory constants and functions got moved a bit so I had to correct their addresses [21:14:19] program alarm [21:14:29] 1502 [21:14:52] it tried to show the countdown [21:15:42] and then it threw me out of P00 and gave the 1502 [21:15:48] let's check this again [21:16:04] illegal flashing display eh? [21:16:53] it should be flashing V06 N34? [21:18:02] yeah [21:19:09] did you just copy straight from my gist without looking at the original? and replace the values in the octal column for the lines with "should" comments? [21:19:24] if so, I probably have another typo somewhere... [21:20:22] yeah, I copied from yours. checking agains CSM Data Book now [21:21:16] I didn't include the first line of ECSTEER [21:21:57] ah [21:22:00] typo at 1524 [21:22:04] 10057 should be 10067 [21:22:20] although I'm not sure that would necessarily have an effect [21:24:28] ah [21:24:31] another thing to try [21:24:35] maybe I'm wrong about GOFLASH [21:24:41] maybe it's REGODSP [21:24:52] I'll quickly try again with 10067 [21:24:55] in which case, change 1542 from my 20720 back to the original 20707 [21:25:06] that seems much more likely to be the problem [21:25:08] I'm like 2 minutes before TB6, so testing is quick [21:25:22] you come up with the alternative in the mean time :P [21:25:29] haha alright [21:26:17] thewonderidiot - Yes, just read through all of that. I cannot tell if they are discussing the internal clocking within the CDU which is driven by the CDUCLK (F01A) or the external pulses to the AGC. The sampling rate of gyro error internal to the CDU would be at least 2x faster than the external pulse rate to the AGC. [21:26:33] yeah, it's all very confusing [21:27:07] indy91, I don't see any other typos -- so that is my suggestion [21:27:27] 10067 didn't fix it [21:27:37] I'll try 20707 [21:28:16] third attempt, the third one always workd [21:28:18] 10067 should still say [21:28:20] *stay [21:28:22] haha [21:28:27] yes [21:29:29] and that did it [21:29:35] got a countdown [21:30:38] perfect [21:31:36] and it set the output bit at the right time [21:31:52] :D [21:32:57] thanks for working that out! [21:33:16] my pleasure, that was fun! [21:34:06] https://history.nasa.gov/afj/ap11fj/a11loc/a11-loc-l2-22a.jpg [21:34:24] now I can use this from the "new" Apollo 11 launch checklist :D [21:34:30] \o/ [21:34:43] well, I could before, but before I had to trust on the LVDC starting TB6 and all [21:35:17] and who trusts that hunk of junk :P [21:35:38] well, it still needs to execute the flight sequence program right [21:35:50] minor stuff like, commanding pressurizing tanks [21:36:22] but I think those things could also be uplinked [21:36:28] which is again going through LVDC software [21:36:42] I think they did that with the third S-IVB burn on Apollo 9 [21:36:52] uplink the commands for the whole ignition sequence [21:38:30] oh interesting [21:38:48] and that's a lot of commands [21:39:01] was the flight program just not ready to do that burn yet? [21:39:02] TB6 starts almost 10 minutes before ignition [21:39:20] well it did have separate timebases for all the extra stuff Apollo 9 did [21:39:39] so it was definitely a very custom flight program with many differences to a lunar one [21:40:34] it's possible that they didn't have enough memory to store yet another long list of commands [21:41:13] for each commands you need to store a time, a Saturn stage the command is going to and the ID of the command [21:41:27] we actually have the pseudocode of that in that document that translated LVDC code [21:41:33] well, translated code [21:41:39] for one or two of the timebases [21:42:13] neat [21:42:25] the 2nd S-IVB burn on Apollo 9 is interesting [21:42:37] TB6 start works just like normal [21:42:52] some geometry to figure out when to go to the Moon basically [21:43:01] but then the burn itself doesn't even use the IGM [21:43:09] it's a fixed attitude, fixed time burn [21:43:24] sounds very hacky to me [21:43:45] kind of like Skylarks "disable lunar capability" just rerouting the code and not using the normal TLI stuff [21:44:03] hahaha [21:46:38] well, thanks again for the help. Good night! [21:46:46] Over in CDU-land, For now I'm going with the same assumptions as nassp and use the 3200pps rate for now to get this running. Still looking for a description of the external CDU to AGC interface that doesn't confuse things with discussing what's happening inside the CDU... [21:47:47] I've been trying and failing to find such a thing for the past bit too [21:48:55] I think the mention of rates over 6400 must be internal CDU clocks. But I cannot prove that. Also cannot get consistent documentation describing if the 6400 is internal or external pulse rate. [21:49:42] yeah I'm on board with you that I highly doubt anything above 6400pps ever went out of the CDU [21:51:20] I think you might not be getting consistent documentation because 6400pps was both [21:51:48] perhaps when internal was 12.8kpps, external was 6.4kpps, and when internal was 6.4kpps, external was 3.2kpps [21:52:27] I agree. For now 3200 is easy to implement in software on my 64MHZ PIC controller. 6400 is a little more challenging. So I'll start with 3200 :) [21:52:36] fair enough! haha [22:05:00] oh!! bigger caps from digikey are here [22:05:13] time to see if this solves the regulation problem [22:08:12] lol. Placing my order this weekend. Will be wed or so when I can start wiring again. Have fun! [22:23:45] yep, that did it!! regulated voltage is now perfectly stable even with sudden changes from no load to full load :D [22:34:30] before it got angry and spiky with changes between even 40mA and 50mA but now I can switch between 4mA and 150mA and it doesn't bat an eye [22:49:18] Okay, so ready for the real thing? [22:55:34] hopefully, that was the only known issue [22:55:59] I'll hopefully be getting the test connector simulator board in this week and then I can really run it through its paces [17:52:13] morning! [18:16:23] hey [18:20:06] hey [18:20:07] what's up? [18:41:03] finished putting together PDFs of the new Apollo 11 checklists [18:41:28] awesome :D [18:41:28] some final touches on the Launch Window Processor before the initial version is getting released [18:41:41] oh sweet [18:43:24] and bigger capacitors are good, I read [18:51:05] yes! [18:51:12] voltage is super smooth now [18:51:47] so I'm back down to no known issues with the electrical design [18:53:27] that's a good number to have [18:54:36] I'm down to the same known issue with the LWP as the real one, haha [18:55:43] hah! [18:55:50] I would count that as a feature then :D [18:56:04] yeah [18:56:25] although the FDO Console Handbook says it should only happen in rare cases [18:56:34] while it will always happen in my version [18:56:46] they seem to have implemented a fix for it, which doesn't work 100% reliable [18:57:36] it's when you launch to a spacecraft that has an inclination that is close to or lower than the latitude of the KSC [18:57:49] like Hubble, which was launched directly east from KSC [18:58:32] it's even worse in Orbiter actually [18:58:33] why does it always happen in your version? [19:00:01] it compares orbital planes and when the target is in an orbit that isn't really reachable (inclination < latitude) then you never really end up in the same orbit when it's iterating on the launch time [19:00:40] it actually does happen every time in the real one. Then you have to check a "closest approach" box on the input screen and then it should work [19:01:02] and if that doesn't work then the backup technique is to bias the latitude of the launch site southwards [19:01:25] and that's working very well in my version [19:01:36] it's worse in Orbiter because Earth is spherical [19:01:52] so Hubble has an inclination of 28.47° [19:02:25] LC-39 is at 28.6° latitude [19:02:51] geocentric latitude [19:03:05] same geodetic latitude as Hubble [19:03:20] so that's why it is even worse in Orbiter [19:03:29] I see [19:03:55] but if you make it think LC-39 is at e.g. 28.41°, it works very well [19:04:30] and this is why FDOs probably needed as much training as astronauts [19:04:53] because the tools they were using were rather difficult to use, with workarounds etc. :D [19:05:40] hehehe [19:56:09] night! [17:26:56] morning! [18:47:39] hey Mike [19:21:33] hey [19:30:44] SteveH: I added some more stuff to the monitor this weekend -- latching indicators for all of the alarms (along with a reset button) and all of the ADC channels [19:30:45] https://i.imgur.com/zC3b9SI.png [19:30:52] I ran out of vertical room so I've expanded to the side [19:30:58] how does this look so far? [19:35:12] your monitor is hot [19:35:26] it's a bit toasty haha [19:35:31] that's the internal die temp for the zynq [19:36:25] it does end up sinking a lot of current from the AGC -- I need to look up what the safe upper bound on that is [19:36:41] Ryan needs to update the ECS so that your monitor can stay cool [19:36:51] yeah where is that guy [19:37:01] he did pop in the other day right? I wasn't just dreaming that? :P [19:37:18] uhh, I didn't see him [19:38:16] mmm [19:38:25] and maybe by the other day I mean mid-february [19:39:09] that sounds more likely [19:41:53] oh yeah that temperature is fine. the FPGA will shut itself off when it hits 125C, and then will come back up when it cools down to 50C [19:42:02] I'm not even at that "low enough" temperature [19:42:33] good to know [19:43:19] my conversion for the AGC temperature is totally wrong in that picture [19:43:38] although my thermistor from digikey is not really close to the behavior of the AGC's so it doesn't matter too much heh [19:44:45] thewonderidiot: very nice! [19:45:29] Pretty much bringing out ch77? [19:45:59] more or less, but including the alarms that aren't captured in it [19:46:22] and the switches under the OSCAL and SCDBL lights are for DOSCAL and DBLTST, respectively [19:46:51] nope that name is continuing to confuse me [19:46:56] SCAFL and SCDBL lights :P [19:47:29] I have no idea why they decided to call the line to cause a SCAFL "DOSCAL" instead of "DSCAFL" since there is an alarm called "OSCAL" [19:47:38] I like it. Now that you've grown the screen size, what are you going to add to fill all that empty space" :D [19:47:51] all of the memory simulation and dumping stuff [19:47:58] gotcha [19:48:27] probably continuing in the line of the original monitor and will have one enable switch for each bank for rope and erasable simulation [19:48:33] with buttons to set and unset all switches [19:48:55] That functionality will allow the real AGC to run with the erasable memory removed? [19:49:06] ...although I might just have a single switch for banks 44-100 [19:49:12] yep [19:49:15] Yup, just no need for the patch cords. [19:49:34] yeah [19:49:50] I agree, a single switch for all program memory would make things easier. Don't think you'll be wanting to simulate just one rope? [19:49:59] and then there will be buttons to dump fixed to file, dump erasable to file, load erasable from file, load rope from file... [19:50:14] probably a button to load an NASSP padload [19:50:49] yeah, I think the idea there is that you can just patch a few words in a rope, for example, and then only simulate that bank, so the rest of the addresses still cycle the real ropes [19:51:01] but I agree that most of the time you'll have either all or none of the switches set [19:51:28] Yeah, I'm currently uploading the apollo 15 padload via a hard-coded list of upload strings embedded in my source code. It works and it's fun to watch the DSKY spaz out while the entire padload executes. [19:51:38] hahaha [19:52:24] I need to fix that and add a file chooser to select padload or other erasable memory content to upload via the uplink. [19:54:02] I spent more time doing yard work this weekend than working on my agc. I need to get my priorities straight. [19:54:21] hehehe seriously [19:54:35] Can't wait to see the memory management functions on your monitor [19:54:56] hopefully they should come relatively quickly [19:55:11] I'm doing all of this other stuff right now because it's easy to do without the test connector simulator board [19:55:24] but once that board comes in I can really get cracking on memory simulation [19:56:37] Selfish question, any reason why your monitor would not work with a 5V AGC? [19:56:40] NASSP padloads still aren't complete, some of it is loaded in code, the first time the AGC is started up [19:56:45] and it all works in the Icarus simulation, so theoretically the only challenging part will be streaming all of the data to and from the FPGA's internal memory [19:57:06] but by now it's only launchpad latitude, longitude and altitude. I should just add them to the padload, even if they are overwritten in code [19:57:35] The only thing you can't do is use P11 and expect that it ends up having a reasonable state vector after orbital insertion [19:57:46] LM padloads are complete [19:57:52] just the CMC ones not [19:58:10] SteveH: depends on the logical "1" voltage -- the FPGA pins are only 3.3V-compatible [19:58:20] you're fine on the outputs if you left all of the monitor pins open-drain [19:58:37] but your inputs need to be able to register 3.3V as a "1" [19:58:50] and indy91 yes, you should definitely do that :D [19:59:20] we have the spherical Earth issue of course, but I'll just add the numbers from the actual padload and let it overwrite [19:59:36] that way the scenario files have the complete numbers that work well with the real Earth [19:59:53] the only difference is then no IMU biases etc. [20:00:54] sounds good to me :D [20:01:13] thewonderidiot: thanks, I'll check the logic levels on the gates I'm using. Worst case is a need an adapter board with some level shifting on the inputs. Yes all outputs are open-drain. [20:01:22] you're using 74LS? [20:01:32] yes [20:02:13] Wait, using 74LS for the open drain since that's all that was readily available in DIP. main logic is 74HC [20:02:25] oh cool. [20:03:19] hmmm what manufacturer? it's looking like it might be marginal with 74HC at 5V [20:04:23] Mostly TI, but not exclusively. If it's close I'll invest in creating an adapter board with some level shifting. Think I even have a few NOS HARRIS chips in there :) [20:05:06] yeah SN74HC02 says that logic "1" at VCC=4.5V is 3.15V, and at VCC=6V it's 4.2V [20:05:12] which looks linear so at 5V you'd need 3.5V :/ [20:06:15] Yeah, I figured. Not terribly surprised. Still a few dozen level shifters is easy compared to all the work you've put into the monitor. [20:06:36] you'll need 33 of them :) [20:06:58] see, less than 3 dozen. easy.... ;) [20:07:01] hehehe [20:07:22] I've become de-sensitized to any number of digital lines less than 50-100 working on this thing [20:08:15] hahahaha [20:12:14] night!